Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Fix
Nothing published yet: no patch, vendor advisory or mitigation reference on NVD, no vendor advisory in the News for this CVE, not in CISA's KEV, no fixed package version. BaselineWatch does not guess at one.
Change history 1
- First seenCVSS 5.7NVD modified 2026-10-15 01:17
Affected (CPE criteria) 0
NVD has not attached CPE configurations yet.
References 8
- https://intel.com/content/www/us/en/security-center/advisory/intel-sa-01153.html
- http://www.openwall.com/lists/oss-security/2025/05/12/5
- http://xenbits.xen.org/xsa/advisory-469.html
- https://lists.debian.org/debian-lts-announce/2025/05/msg00021.html
- https://lists.debian.org/debian-lts-announce/2025/08/msg00010.html
- https://lists.debian.org/debian-lts-announce/2025/10/msg00007.html
- https://cert-portal.siemens.com/productcert/html/ssa-019113.html
- https://cert-portal.siemens.com/productcert/html/ssa-457936.html