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CVE-2025-54515

1.0 low SSVC exploitation: none Deferred
NVD · CVE.org

The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors (TF-A) for Arm’s Power State Coordination Interface (PSCI) commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were from processors in the secure state instead of the non-secure state.

Fix

Nothing published yet: no patch, vendor advisory or mitigation reference on NVD, no vendor advisory in the News for this CVE, not in CISA's KEV, no fixed package version. BaselineWatch does not guess at one.

Change history 1

  1. First seenCVSS 1.0NVD modified 2026-10-18 20:10

Affected (CPE criteria) 0

NVD has not attached CPE configurations yet.

References 1